Secure and efficient software masking on superscalar pipelined processors

DOI10.1007/978-3-030-92075-3_1MaRDI QIDQ6157510zbMATH OpenOpenAlexFDO

Authors Barbara Gigerl, Robert Primas, Stefan Mangard

Publication date 12 May 2023

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-030-92075-3_1

zbMATH Keywords

application-level processorsCocoglitchesmaskingprobing modelside-channel analysisSweRVverification

Mathematics Subject Classification ID

Data encryption (aspects in computer science) (68P25) Cryptography (94A60)

Cites work

• \textsc{SCInfer}: refinement-based verification of software countermeasures against side-channel attacks
• A formal study of power variability issues and side-channel attacks for nanoscale devices
• Advances in Cryptology - CRYPTO 2003
• Bitsliced masking and ARM: friends or foes?
• Consolidating masking schemes
• Conversion of security proofs from one leakage model to another: a new issue
• Formal verification of masked hardware implementations in the presence of glitches
• scientific article; zbMATH DE number 1418307 (Why is no real title available?)
• Keccak
• Masking AES with \(d+1\) shares in hardware
• Parallel Implementations of Masking Schemes and the Bounded Moment Leakage Model
• Private multiplication over finite fields
• Protecting Circuits from Leakage: the Computationally-Bounded and Noisy Cases
• Provably secure higher-order masking of AES
• Reconciling \((d+1)\) masking in hardware and software
• SILVER -- statistical independence and leakage verification
• Synthesis of masking countermeasures against side channel attacks
• Threshold Implementations Against Side-Channel Attacks and Glitches
• Tornado: automatic generation of probing-secure masked bitsliced implementations
• Verified Proofs of Higher-Order Masking

Cited in

(1)

• Formal verification of arithmetic masking in hardware and software

This page was built for publication: Secure and efficient software masking on superscalar pipelined processors

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q6157510)