VLSI architectures for sliding-window-based space-time turbo Trellis code decoders

DOI10.1155/2012/614259zbMATH Open1253.94079DBLPjournals/jece/PassasF12OpenAlexW2075784619WikidataQ56836851 ScholiaQ56836851MaRDI QIDQ693833FDOQ693833

Authors: Georgios Passas, Steven Freear 

Publication date: 11 December 2012

Published in: Journal of Electrical and Computer Engineering (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1155/2012/614259

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Mathematics Subject Classification ID

Decoding (94B35) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cites Work

• Optimal decoding of linear codes for minimizing symbol error rate (Corresp.)
• Space-time turbo trellis coded modulation for wireless data communications
• Convergence behavior of iteratively decoded parallel concatenated codes
• Reconfigurable turbo decoding for 3G applications

Cited In (1)

• Turbo decoder architecture for beyond-4G applications

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