VLSI architectures for sliding-window-based space-time turbo Trellis code decoders

DOI10.1155/2012/614259MaRDI QIDQ693833zbMATH OpenOpenAlexDBLPWikidataFDO

Authors Georgios Passas, Steven Freear

Publication date 11 December 2012

Published in Journal of Electrical and Computer Engineering (Search for Journal in Brave)

Copyright license Creative Commons Attribution 4.0 International

Full work available at URL https://doi.org/10.1155/2012/614259

Mathematics Subject Classification ID

Decoding (94B35) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

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Cites work

• Convergence behavior of iteratively decoded parallel concatenated codes
• Optimal decoding of linear codes for minimizing symbol error rate (Corresp.)
• Reconfigurable turbo decoding for 3G applications
• Space-time turbo trellis coded modulation for wireless data communications

Cited in

(1)

• Turbo decoder architecture for beyond-4G applications

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