Turbo decoder architecture for beyond-4G applications

DOI10.1007/978-1-4614-8310-6zbMATH Open1275.68007OpenAlexW2481214884MaRDI QIDQ2845007FDOQ2845007

Authors: Cheng-Chi Wong, Hsie-Chia Chang 

Publication date: 21 August 2013

Full work available at URL: https://doi.org/10.1007/978-1-4614-8310-6

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Mathematics Subject Classification ID

Research exposition (monographs, survey articles) pertaining to computer science (68-02) Mathematical problems of computer architecture (68M07)

Cited In (2)

• A scalable system architecture for high-throughput turbo-decoders
• VLSI architectures for sliding-window-based space-time turbo Trellis code decoders

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