An efficient in-place VLSI architecture for Viterbi algorithm

DOI10.1023/A:1022246815354MaRDI QIDQ1405499zbMATH OpenOpenAlexFDO

Authors Yun-Nan Chang

Publication date 25 August 2003

Published in Journal of VLSI signal processing systems for signal, image and video technology (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1023/a:1022246815354

zbMATH Keywords

Viterbi decoderACS unitregister-exchangetrace-back

Mathematics Subject Classification ID

Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

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