FPGA architecture and implementation of sparse matrix-vector multiplication for the finite element method
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Cites work
- scientific article; zbMATH DE number 1941118 (Why is no real title available?)
- Determination of Stripe Structures for Finite Element Matrices
- Parallel solution of linear systems with striped sparse matrices
- Processor-efficient sparse matrix-vector multiplication
- SPAR: a new architecture for large finite element computations
Cited in
(8)- Sparse Cholesky factorization on FPGA using parameterized model
- High-Performance Mixed-Precision Linear Solver for FPGAs
- Analysis of the basic implementation aspects of hardware-accelerated density functional theory calculations
- FPGA implementation of ECT digital system for imaging conductive materials
- FPGA computation of the 3D heat equation
- Towards an FPGA solver for the PageRank eigenvector problem
- Run-time-reconfigurable multi-precision floating-point matrix multiplier intellectual property core on FPGA
- scientific article; zbMATH DE number 5353409 (Why is no real title available?)
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