Design of exclusive or sum-of-products (ESP) logic arrays with universal tests for detecting stuck-at and bridging faults
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Publication:792959
DOI10.1016/0045-7906(84)90018-1zbMATH Open0537.94035OpenAlexW2020652578MaRDI QIDQ792959FDOQ792959
Authors: Bhargab B. Bhattacharya, Bidyut Gupta, Satyabrata Sarkar, A. K. Choudhury
Publication date: 1984
Published in: Computers and Electrical Engineering (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/0045-7906(84)90018-1
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