On the performance of transputer arrays for dense linear systems

DOI10.1016/0167-8191(90)90035-8MaRDI QIDQ921858zbMATH OpenOpenAlexFDO

Authors Jayaramaiah Boreddy, Arogyaswami J. Paulraj

Publication date 1990

Published in Parallel Computing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/0167-8191(90)90035-8

zbMATH Keywords

asymptotic link bandwidthbyte transfer rateCholesky methodconcurrent floatingdense linear systemsexperimental investigationGauss-Jordan methodGivens methodsHouseholder methodinteger arithmeticlogarithmic array indexingLUD methodmatrix factorization algorithmsmultitransputer arraysnormalized arithmeticon-chip/off-chip RAMperformance message lengthstartup time

Mathematics Subject Classification ID

Direct numerical methods for linear systems and matrix inversion (65F05) Numerical algorithms for specific classes of architectures (65Y10) Cellular automata (computational aspects) (68Q80)

Review text

This paper presents the results of an experimental investigation of the computation and communication performance for single and multitransputer arrays. The study is focussed on the normalized arithmetic, concurrent floating and integer arithmetic, logarithmic array indexing, and on- chip/off-chip RAM; startup time, byte transfer rate, asymptotic link bandwidth, and the effect of the use of some performance maximization techniques on execution time. Also, the half performance message length for simultaneous operation of k \((k=1,...,4)\) links at 10/20 MHz clock in uni- and bidirectional modes is estimated. This study has been made for matrix factorization algorithms for dense linear systems, including LUD, Householder, Gauss-Jordan, Cholesky and Givens methods. The main directions of a future investigation are also presented.

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Cited in

(2)

• On the performance of transputer networks for solving linear systems of equations
• On high-speed computing with a programmable linear array

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