VIS
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swMATH40003MaRDI QIDQ55703FDOQ55703
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Cited In (10)
- Finding and fixing faults
- Specification and verification of concurrent programs through refinements
- Correct Hardware Design and Verification Methods
- Compositional SCC analysis for language emptiness
- Benchmarking a model checker for algorithmic improvements and tuning for performance
- Exploring structural symmetry automatically in symbolic trajectory evaluation
- Linear temporal logic symbolic model checking
- HRELTL: a temporal logic for hybrid systems
- From Philosophical to Industrial Logics
- Symbolic graphs: Linear solutions to connectivity related problems
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