Some combinatorial optimization problems arising from VLSI circuit design
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combinatorial optimizationVLSI circuit designforbidden configurationrectilinear convexityrectilinear embedding
Graph theory (including graph drawing) in computer science (68R10) Combinatorial optimization (90C27) Planar graphs; geometric and topological aspects of graph theory (05C10) Applications of graph theory to circuits and networks (94C15) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)
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(16)- Combinatorial Problems in Chip Design
- A constraint satisfaction approach to a circuit design problem
- Digital Circuit Optimization via Geometric Programming
- scientific article; zbMATH DE number 125488 (Why is no real title available?)
- scientific article; zbMATH DE number 49142 (Why is no real title available?)
- scientific article; zbMATH DE number 3970689 (Why is no real title available?)
- scientific article; zbMATH DE number 433056 (Why is no real title available?)
- scientific article; zbMATH DE number 4132095 (Why is no real title available?)
- Boolean approaches to graph embeddings related to VLSI
- Combinatorial optimization in VLSI design
- VLSI circuit performance optimization by geometric programming
- scientific article; zbMATH DE number 4114383 (Why is no real title available?)
- Orthogonal drawings of graphs for the automation of VLSI circuit design
- scientific article; zbMATH DE number 3938571 (Why is no real title available?)
- scientific article; zbMATH DE number 4064479 (Why is no real title available?)
- Some applications of combinatorial optimization in parallel computing
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