Pages that link to "Item:Q5966707"
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The following pages link to Higher Order Logic and Hardware Verification (Q5966707):
Displaying 10 items.
- Mechanised wire-wise verification of Handel-C synthesis (Q436367) (← links)
- A novel formalization of symbolic trajectory evaluation semantics in Isabelle/HOL (Q541222) (← links)
- Verification of FPGA layout generators in higher-order logic (Q877830) (← links)
- A theory of abstraction (Q1199923) (← links)
- Algebraic models of correctness for abstract pipelines. (Q1426058) (← links)
- Refinement of time (Q1589580) (← links)
- Algebraic models of microprocessors architecture and organisation (Q1815999) (← links)
- Verifying a scheduling protocol of safety-critical systems (Q2424721) (← links)
- Proof producing synthesis of arithmetic and cryptographic hardware (Q2642982) (← links)
- Coquet: A Coq Library for Verifying Hardware (Q3100217) (← links)
