Systolic architectures for vector quantization

DOI10.1109/29.7553MaRDI QIDQ3815513zbMATH OpenOpenAlexFDO

Authors Grant A. Davidson, Peter R. Cappello, Allen Gersho

Publication date 1988

Published in IEEE Transactions on Acoustics, Speech, and Signal Processing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/29.7553

zbMATH Keywords

linear arraypattern matchingspeech recognitionsystolic arraystradeoffs between speed and VLSI chip areavector quantization

Mathematics Subject Classification ID

Theory of software (68N99) Cellular automata (computational aspects) (68Q80) Pattern recognition, speech recognition (68T10)

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