Typing the ISA to cluster the processor

DOI10.1016/S0167-739X(02)00051-1MaRDI QIDQ4788314zbMATH OpenOpenAlexFDO

Authors Bernard Goossens

Publication date 21 January 2003

Published in Future Generation Computer Systems (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/s0167-739x(02)00051-1

zbMATH Keywords

MicroarchitectureClustered processorFetch pathTyped ISA

Mathematics Subject Classification ID

Computer system organization (68M99)

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