Xilinx
From MaRDI portal
Cited in
(50)- GILK
- HeteroMPI
- Evolvable hardware: genetic search in a physical realm
- Modeling and simulation of FPGA-based variable-speed drives using Simulink.
- P-CORDIC
- MDCT/MDST
- ESPADON
- dfp
- HASPRNG
- Ibis
- Embedded real-time simulators for electromechanical and power electronic systems using system-on-chip devices
- Spartan 3E Starter Kit
- SUIF
- TinyECC
- Efficient FPGA design of exception-free generic elliptic curve cryptosystems
- Qwt
- Ocelot
- DSP Builder
- Data processing in the firmware systems for logic control based on search networks
- ModelSim
- Handel-C
- Multidimensional DSP core synthesis for FPGA
- MODTRAN
- Design and implementation of flexible resampling mechanism for high-speed parallel particle filters
- Snort
- HDL Coder
- Emulation of high-performance correlation-based quantum clustering algorithm for two-dimensional data on FPGA
- Towards lattice quantum chromodynamics on FPGA devices
- ECC on your fingertips: a single instruction approach for lightweight ECC design in \(\mathrm{GF}(p)\)
- Sliding mode approach to torque and pitch control for an wind energy system using FPGA
- Performance of a new split digital phase lock loop in additive wideband Gaussian noise
- Black-box side-channel attacks highlight the importance of countermeasures. An analysis of the Xilinx Virtex-4 and Virtex-5 bitstream encryption mechanism
- TGFF
- An accelerated computational approach in proteomics
- FuzzyTECH
- FRIDGE
- GenBank
- HALT
- A novel decimal logarithmic converter based on first-order polynomial approximation
- LIMPIC
- CAD TOOL FOR IMPLEMENTATION OF FUZZY CONTROLLERS ON FPGAs
- scientific article; zbMATH DE number 7310255 (Why is no real title available?)
- Dynamics and bifurcations in networks designed for frequency conversion
- Field programmable gate array based predictive control system for spacecraft rendezvous in elliptical orbits
- MeaBench
- HASPRNG: hardware accelerated scalable parallel random number generators
- Efficient realization of large size two's complement multipliers using embedded blocks in FPGAs
- Hardware implementation of finite-field division
- Efficient hardware implementation of finite fields with applications to cryptography
- Verification of FPGA layout generators in higher-order logic
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