Multidimensional DSP core synthesis for FPGA
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(7)- A compact DSP core with static floating-point arithmetic
- scientific article; zbMATH DE number 1941143 (Why is no real title available?)
- scientific article; zbMATH DE number 1844661 (Why is no real title available?)
- scientific article; zbMATH DE number 1751894 (Why is no real title available?)
- scientific article; zbMATH DE number 918592 (Why is no real title available?)
- Multidimensional exploration of software implementations for DSP algorithms
- AVSynDEx: a rapid prototyping process dedicated to the implementation of digital image processing applications on multi-DSP and FPGA architectures
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