Person:1079543: Difference between revisions

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Person:1079543
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m AuthorDisambiguator moved page Melvin A. Breuer to Melvin A. Breuer: Duplicate
 
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Latest revision as of 09:27, 13 December 2023

Available identifiers

zbMath Open breuer.melvin-allenMaRDI QIDQ1079543

List of research outcomes





PublicationDate of PublicationType
Testable MUTEX Design2021-08-26Paper
Self-diagnosis of regular arrays of processors1993-04-01Paper
Test schedules for VLSI circuits having built-in test hardware1987-01-01Paper
Incremental Processing Applied to Munkres’ Algorithm and Its Application in Steinberg’s Placement Procedure1985-01-01Paper
An optimum testing algorithm for some symmetric coherent systems1984-01-01Paper
Fault Diagnosis in Synchronous Sequential Circuits Based on an Effect–Cause Analysis1982-01-01Paper
Probabilistic Aspects of Boolean Switching Functions via a New Transform1981-01-01Paper
A Fault-Collapsing Analysis in Sequential Logic Networks1981-01-01Paper
Functional Level Primitives in Test Generation1980-01-01Paper
Multiple Fault Diagnosis in Combinational Circuits Based on an Effect-Cause Analysis1980-01-01Paper
A probabilistic model for the analysis of the routing process for circuits1980-01-01Paper
On Redundancy and Fault Detection in Sequential Circuits1979-01-01Paper
A forced directed component placement procedure for printed circuit boards1979-01-01Paper
https://portal.mardi4nfdi.de/entity/Q41593121977-01-01Paper
Identification of Multiple Stuck-Type Faults in Combinational Networks1976-01-01Paper
Procedures for Eliminating Static and Dynamic Hazards in Test Generation1974-01-01Paper
The Effects of Races, Delays, and Delay Faults on Test Generation1974-01-01Paper
A Note on Three-Valued Logic Simulation1972-01-01Paper
Generation of Fault Tests for Linear Logic Networks1972-01-01Paper
A Random and an Algorithmic Technique for Fault Detection Test Generation for Sequential Circuits1971-01-01Paper
Simplification of the Covering Problem with Application to Boolean Expressions1970-01-01Paper
Functional Partitioning and Simulation of Digital Circuits1970-01-01Paper
Combinatorial equivalence of (0,1) circulant matrices1969-01-01Paper
Generation of optimal code for expressions via factorization1969-01-01Paper
An unexpected result in coding the vertices of a graph1967-01-01Paper
Adaptive computers1967-01-01Paper
Coding the vertexes of a graph1966-01-01Paper
Implementation of Threshold Nets by Integer Linear Programming1965-01-01Paper
Techniques for the simulation of computer logic1964-01-01Paper
The Borel-Tanner distribution1960-01-01Paper

Research outcomes over time

This page was built for person: Melvin A. Breuer