A design of programmable logic arrays with universal tests

DOI10.1109/TCS.1981.1084932MaRDI QIDQ3912733zbMATH OpenOpenAlexFDO

Authors Hideo Fujiwara, K. Kinoshita

Publication date 1981

Published in IEEE Transactions on Circuits and Systems (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tcs.1981.1084932

zbMATH Keywords

fault detectionfault locationlogic circuitsuniversal test sets

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

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