A note on error detection codes for asymmetric channels
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(22)- Checking of combinational circuits basing on modification sum codes
- Constructing self-testing circuits with the use of step-by-step (cascade) control
- Delay-insensitive codes - an overview
- A t-unidirectional error-detecting systematic code
- Efficient q-ary immutable codes
- A construction of \(V_{h}\)-sequences and its application to binary asymmetric error-correcting codes
- Sum codes with efficient detection of twofold errors for organization of concurrent error-detection systems of logical devices
- New protection technique against unidirectional MEUs for FIR filters
- A modified summation code for organizing control of combinatorial circuits
- On codes with summation of data bits in concurrent error detection systems
- Sum codes with fixed values of multiplicities for detectable unidirectional and asymmetrical errors for technical diagnostics of discrete systems
- Codici binari a peso costante
- New structures of the concurrent error detection systems for logic circuits
- Conditions for detecting a logical element fault in a combination device under concurrent checking based on Berger's code
- Applications of modular summation codes to concurrent error detection systems for combinational Boolean circuits
- Invited paper t-Symmetric and d-unidirectional (d > t) error-detecting cyclic AN arithmetic codes
- Summation codes for organization of control of combinational circuits
- On summation code properties in functional control circuits
- Weight-based Bose-Lin codes in concurrent error-detection circuit based on Boolean signal correction
- Optimal combinatorial neural codes via symmetric designs
- New techniques for constructing t-EC/d-ED/AUED and t-EC/d-ED/s-UED codes
- A new class of symmetric error correcting/unidirectional error detecting codes
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