Enhancing compiler techniques for memory energy optimizations
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(21)- Energy-saving compilation for mobile systems
- Using FORAY models to enable MPSoC memory optimizations
- Energy-aware assignment and scheduling for hybrid main memory in embedded systems
- Evaluating performance and power of object-oriented vs. procedural programming in embedded processors
- Power-efficient system design
- Energy minimization with loop fusion and multi-functional-unit scheduling for multidimensional DSP
- Experimental evaluation of energy behavior of iteration space tiling
- Instruction balance and its relation to program energy consumption
- Improving off-chip memory energy behavior in a multi-processor, multi-bank environment
- Algorithmic techniques for memory energy reduction
- scientific article; zbMATH DE number 1997323 (Why is no real title available?)
- Aggressive memory-aware compilation
- Global variable promotion: Using registers to reduce cache power dissipation
- Influence of loop optimizations on energy consumption of multi-bank memory systems
- Hybrid heuristics for optimizing energy consumption in embedded systems
- Euro-Par 2004 Parallel Processing
- Euro-Par 2004 Parallel Processing
- scientific article; zbMATH DE number 2204029 (Why is no real title available?)
- Energy-constrained software prefetching optimization
- Languages and Compilers for Parallel Computing
- Improving chip multiprocessor reliability through code replication
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