Influence of loop optimizations on energy consumption of multi-bank memory systems

DOI10.1007/3-540-45937-5_20MaRDI QIDQ4738397zbMATH OpenFDO

Authors Ibrahim Kolcu, I. Kadayif, Mahmut Taylan Kandemir

Publication date 11 August 2004

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL http://link.springer.de/link/service/series/0558/bibs/2304/23040276.htm

Mathematics Subject Classification ID

Theory of compilers and interpreters (68N20) Computing methodologies and applications (68U99)

Recommendations

• Improving off-chip memory energy behavior in a multi-processor, multi-bank environment
• Enhancing compiler techniques for memory energy optimizations
• Experimental evaluation of energy behavior of iteration space tiling
• Algorithmic techniques for memory energy reduction
• Languages and Compilers for Parallel Computing

Cited in

(7)

• Memory design and exploration for low power, embedded systems
• Analysis and approximation for bank selection instruction minimization on partitioned memory architecture
• Energy minimization with loop fusion and multi-functional-unit scheduling for multidimensional DSP
• Experimental evaluation of energy behavior of iteration space tiling
• Improving off-chip memory energy behavior in a multi-processor, multi-bank environment
• Loop transformations for reducing data space requirements of resource-constrained applications
• Languages and Compilers for Parallel Computing

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