Hardware synthesis using SAFL and application to processor design (invited talk)

DOI10.1007/3-540-44798-9_2MaRDI QIDQ4787209zbMATH OpenFDO

Authors Alan Mycroft, Richard Sharp

Publication date 9 January 2003

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL http://link.springer.de/link/service/series/0558/bibs/2144/21440013

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07) Functional programming and lambda calculus (68N18) Computing methodologies and applications (68U99)

Recommendations

• A higher-level language for hardware synthesis
• Higher-level hardware synthesis.
• Hardware/software co-design using functional languages
• A statistically allocated parallel functional language
• scientific article; zbMATH DE number 1979559

Cited in

(7)

• PICO-NPA: High-level synthesis of nonprogrammable hardware accelerators
• Hardware/software co-design using functional languages
• Compiling SA-C programs to FPGAs: performance results
• Formalization of Data Flow Computing and a Coinductive Approach to Verifying Flowware Synthesis
• Fly -- a modifiable hardware compiler
• Compiling application-specific hardware
• A higher-level language for hardware synthesis

Describes a project that uses

Uses Software

• PVS

This page was built for publication: Hardware synthesis using SAFL and application to processor design (invited talk)

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4787209)