Matching multiplications in bit-vector formulas
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Abstract: Bit-vector formulas arising from hardware verification problems often contain word-level arithmetic operations. Empirical evidence shows that state-of-the-art SMT solvers are not very efficient at reasoning about bit-vector formulas with multiplication. This is particularly true when multiplication operators are decomposed and represented in alternative ways in the formula.We present a pre-processing heuristic that identifies certain types of decomposed multipliers, and adds special assertions to the input formula encoding the equivalence of sub-terms to word-level multiplication. The pre-processed formulas are then solved using an SMT solver. Our experiments with three SMT solvers show that our heuristic allows several formulas to be solved quickly, while the same formulas time out without the pre-processing step.
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Cites work
- A Proof of the Modified Booth's Algorithm for Multiplication
- Decision procedures. An algorithmic point of view. With foreword by Randal E. Bryant
- Majority Gate Networks
- Matching multiplications in bit-vector formulas
- Symbolic trajectory evaluation for word-level verification: theory and implementation
- The strategy challenge in SMT solving
- Tools and Algorithms for the Construction and Analysis of Systems
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