List of research outcomes
This list is not complete and representing at the moment only items from zbMATH Open and arXiv. We are working on additional sources - please check back here soon!
| Publication | Date of Publication | Type |
|---|---|---|
| Reducing the number of LUTs for Mealy FSMS with state transformation International Journal of Applied Mathematics and Computer Science | 2024-07-04 | Paper |
| Logic synthesis for VLSI-based combined finite state machines. Synthesis targeting ASICs, CPLDs and FPGAs Lecture Notes in Electrical Engineering | 2022-10-01 | Paper |
| Improving characteristics of LUT-based mealy FSMs International Journal of Applied Mathematics and Computer Science | 2021-05-03 | Paper |
| Hardware reduction for LUT-based Mealy FSMs International Journal of Applied Mathematics and Computer Science | 2018-10-22 | Paper |
Research outcomes over time
This page was built for person: Kamil Mielcarek
