Improving characteristics of LUT-based mealy FSMs
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Publication:2023587
Recommendations
- Hardware reduction for LUT-based Mealy FSMs
- Structural decomposition as a tool for the optimization of an FPGA-based implementation of a Mealy FSM
- Minimization of Mealy finite-state machines by using the values of the output variables for state assignment
- Mixed encoding of collections of microoperations for a microprogram finite-state machine
- Reducing the use of resources in the FPGA circuit of a Moore FSM
Cites work
- 5 Logic Synthesis Method of Digital Circuits Designed for Implementation with Embedded Memory Blocks of FPGAs
- Decomposition-based logic synthesis for PAL-based CPLDs
- Finite state machine logic synthesis for complex programmable logic devices
- Functional decomposition with application to FPGA synthesis
- Hardware reduction for LUT-based Mealy FSMs
- scientific article; zbMATH DE number 603377 (Why is no real title available?)
- scientific article; zbMATH DE number 978906 (Why is no real title available?)
- scientific article; zbMATH DE number 1941087 (Why is no real title available?)
- scientific article; zbMATH DE number 2170622 (Why is no real title available?)
- Logic synthesis for compositional microprogram control units
- Logical Computation on Stochastic Bit Streams with Linear Finite-State Machines
- Optimization on the complementation procedure towards efficient implementation of the index generation function
- Stochastic neural computation. I. Computational elements
Cited in
(8)- Improving the LUT count for mealy FSMS with transformation of output collections
- Mixed encoding of collections of microoperations for a microprogram finite-state machine
- Structural decomposition as a tool for the optimization of an FPGA-based implementation of a Mealy FSM
- Improvement of FSM synthesis using the transition matrix representation
- Technology mapping of multi-output functions leading to the reduction of dynamic power consumption in FPGAs
- Twofold state assignment for the Moore finite state machines
- Reducing the number of LUTs for Mealy FSMS with state transformation
- Optimizing a mealy FSM circuit in mixed element basis
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