Twofold state assignment for the Moore finite state machines
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Publication:6160549
Cites work
- 5 Logic Synthesis Method of Digital Circuits Designed for Implementation with Embedded Memory Blocks of FPGAs
- Finite state machine logic synthesis for complex programmable logic devices
- Hardware reduction for LUT-based Mealy FSMs
- scientific article; zbMATH DE number 603377 (Why is no real title available?)
- scientific article; zbMATH DE number 3080925 (Why is no real title available?)
- Improving characteristics of LUT-based mealy FSMs
- Joint use of methods of structural decomposition for optimizing the circuit of Moore FSM
- Optimization of circuits of compositional microprogram control units implemented on FPGA
- Structural decomposition as a tool for the optimization of an FPGA-based implementation of a Mealy FSM
- Synthesis of neural-like networks on the basis of conversion of cyclic Hamming codes
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