Technology mapping of multi-output functions leading to the reduction of dynamic power consumption in FPGAs

DOI10.34768/AMCS-2023-0020MaRDI QIDQ6093430zbMATH OpenFDO

Authors Adam Opara, Marcin Kubica

Publication date 7 September 2023

Published in International Journal of Applied Mathematics and Computer Science (Search for Journal in Brave)

Copyright license Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported

Full work available at URL https://doi.org/10.34768/AMCS-2023-0020

zbMATH Keywords

decompositionFPGAlow power synthesisswitching activitytechnology mapping

Mathematics Subject Classification ID

Switching theory, applications of Boolean algebras to circuits and networks (94C11)

Recommendations

• scientific article; zbMATH DE number 1941083
• Technology mapping for low power in logic synthesis
• scientific article; zbMATH DE number 1941087

Cites work

• Analysis of safeness in a Petri net-based specification of the control part of cyber-physical systems
• Binary Decision Diagrams
• Functional decomposition with application to FPGA synthesis
• scientific article; zbMATH DE number 1110630 (Why is no real title available?)
• scientific article; zbMATH DE number 846270 (Why is no real title available?)
• Improving characteristics of LUT-based mealy FSMs
• Improving the LUT count for mealy FSMS with transformation of output collections

Cited in

(2)

• Power minimization of FPRM functions based on polarity conversion
• scientific article; zbMATH DE number 1941094 (Why is no real title available?)

This page was built for publication: Technology mapping of multi-output functions leading to the reduction of dynamic power consumption in FPGAs

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q6093430)