ABC

swMATH12910MaRDI QIDQ24833FDOQ24833

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Source code repository: https://github.com/berkeley-abc/abc

Cited In (39)

• SAT-Based Formula Simplification
• Boolean functional synthesis: hardness and practical algorithms
• The QBF Gallery: behind the scenes
• Partial order reduction for deep bug finding in synchronous hardware
• Practical synthesis of reactive systems from LTL specifications via parity games
• A temporal logic for asynchronous hyperproperties
• Progress in certifying hardware model checking results
• Verified cryptographic code for everybody
• Skolem functions for DQBF
• Automated and scalable verification of integer multipliers
• Advanced exact synthesis of Clifford+T circuits
• Model checking data flows in concurrent network updates
• Compact and efficiently verifiable models for concurrent systems
• Shield synthesis
• Labelled interpolation systems for hyper-resolution, clausal, and local proofs
• Improving characteristics of LUT-based mealy FSMs
• Automated formal analysis and verification: an overview
• Benchmarking a model checker for algorithmic improvements and tuning for performance
• Transfer of model checking to industrial practice
• Symbolic trajectory evaluation
• Verifying chemical reaction network implementations: a pathway decomposition approach
• Optimization techniques for Craig interpolant compaction in unbounded model checking
• Scaling up livelock verification for network-on-chip routing algorithms
• Title not available (Why is that?)
• Unified QBF certification and its applications
• Advanced Boolean techniques. Selected papers from the 13th international workshop on Boolean problems, Bremen, Germany, September 19--21, 2018
• Solving SAT (and MaxSAT) with a quantum annealer: foundations, encodings, and preliminary results
• Heuristic NPN classification for large functions using AIGs and LEXSAT
• Verifying deadlock-freedom of communication fabrics
• Evaluating ESOP Optimization Methods in Quantum Compilation Flows
• Improving the LUT count for mealy FSMS with transformation of output collections
• Encodings of bounded synthesis
• Ancilla-free synthesis of large reversible functions using binary decision diagrams
• SAT-Based Synthesis Methods for Safety Specs
• On compiling Boolean circuits optimized for secure multi-party computation
• Rewriting environment for arithmetic circuit verification
• Cyclic-routing of unmanned aerial vehicles
• Symbolic trajectory evaluation for word-level verification: theory and implementation
• Incremental column-wise verification of arithmetic circuits using computer algebra

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