Power-performance modeling and tradeoff analysis for a high end microprocessor

DOI10.1007/3-540-44572-2_10MaRDI QIDQ2763255zbMATH OpenFDO

Authors John-David Wellman, Pradip Bose, David Brooks, Margaret Martonosi

Publication date 14 January 2002

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL http://link.springer.de/link/service/series/0558/bibs/2008/20080126

Computer system organization (68M99) Computing methodologies and applications (68U99)

We describe a new power-performance modeling toolkit, developed to aid in the evaluation and definition of future power-efficient, PowerPC\(^{TM}\) processors. The base performance models in use in this project are: (a) a fast but cycle-accurate, parameterized research simulator and (b) a slower, pre-RTL reference model that models a specific high-end machine in full, latch-accurate detail. Energy characterizations are derived from real, circuit-level power simulation data. These are then combined to form higher-level energy models that are driven by microarchitecture-level parameters of interest. The overall methodology allows us to conduct power-performance tradeoff studies in defining the follow-on design points within a given product family. We present a few experimental results to illustrate the kinds of tradeoffs one can study using this tool. For the entire collection see [Zbl 0976.68585].

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