Dual-rail transition logic: A logic style for counteracting power analysis attacks

DOI10.1016/J.COMPELECENG.2008.06.004MaRDI QIDQ1007304zbMATH OpenOpenAlexFDO

Authors Amir Moradi, Mohammad Taghi Manzuri Shalmani, M. Salmasizadeh

Publication date 20 March 2009

Published in Computers and Electrical Engineering (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/j.compeleceng.2008.06.004

zbMATH Keywords

DPAcountermeasureside-channel attacksDTLtransition signaling

Mathematics Subject Classification ID

Data encryption (aspects in computer science) (68P25) Nonnumerical algorithms (68W05)

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Cited in

(8)

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• Formal security proofs via Doeblin coefficients: optimal side-channel factorization from noisy leakage to random probing
• Geometry of synthesis. II: From games to delay-insensitive circuits
• A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques
• Double-Data-Rate Computation as a Countermeasure against Fault Analysis
• Cryptographic Hardware and Embedded Systems - CHES 2004
• QRL: a high performance quadruple-rail logic for resisting DPA on FPGA implementations

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