Modeling of priorityless processing in an interleaved memory with a perfectly informed processor

MaRDI QIDQ1067784zbMATH OpenFDO

Authors Antal Iványi, Imre Kátai

Publication date 1985

Published in Automation and Remote Control (Search for Journal in Brave)

zbMATH Keywords

queueingcomplete informationpolynomial optimal algorithmpriorityless queue processingservice speed

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Recommendations

• Modeling a Multiprocessor System with Preemptive Priorities
• scientific article; zbMATH DE number 3949709
• scientific article; zbMATH DE number 3943020
• Exact Response Time Analysis for Fixed Priority Memory-Processor Co-Scheduling
• A model of sequential computation with Pipelined access to memory
• Modeling the backoff strategies of access to shared-memory multiprocessors
• Performance model for a prioritized multiple-bus multiprocessor system

Cited in

(2)

• scientific article; zbMATH DE number 3907808 (Why is no real title available?)
• Optimal parallel control of \(n\) FIFO-queues in shared memory

This page was built for publication: Modeling of priorityless processing in an interleaved memory with a perfectly informed processor

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q1067784)