Higher-order glitches free implementation of the AES using secure multi-party computation protocols
From MaRDI portal
Publication:3172965
DOI10.1007/978-3-642-23951-9_5zbMATH Open1401.94169OpenAlexW2072356129MaRDI QIDQ3172965FDOQ3172965
Publication date: 7 October 2011
Published in: Cryptographic hardware and embedded systems -- CHES 2011. 13th international workshop, Nara, Japan, September 28--October 1, 2011. Proceedings (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/978-3-642-23951-9_5
Cited In (15)
- How Fast Can Higher-Order Masking Be in Software?
- Complementing Feistel Ciphers
- Codes for Side-Channel Attacks and Protections
- ParTI – Towards Combined Hardware Countermeasures Against Side-Channel and Fault-Injection Attacks
- Masking Tables—An Underestimated Security Risk
- Threshold Implementation in Software
- Efficient Leakage Resilient Circuit Compilers
- Leakage-Resilient Cryptography over Large Finite Fields: Theory and Practice
- Polynomial Evaluation and Side Channel Analysis
- Algebraic Decomposition for Probing Security
- Secure Multiparty AES
- Masking and leakage-resilient primitives: one, the other(s) or both?
- Higher-Order Glitch Resistant Implementation of the PRESENT S-Box
- AES side-channel countermeasure using random tower field constructions
- Unifying leakage models: from probing attacks to noisy leakage
Recommendations
- Higher-Order Glitch Resistant Implementation of the PRESENT S-Box 👍 👎
- Threshold Implementations Against Side-Channel Attacks and Glitches 👍 👎
- Higher-Order Threshold Implementations 👍 👎
- An Efficient Side-Channel Protected AES Implementation with Arbitrary Protection Order 👍 👎
- Provably secure higher-order masking of AES 👍 👎
This page was built for publication: Higher-order glitches free implementation of the AES using secure multi-party computation protocols
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3172965)
