Higher-order glitches free implementation of the AES using secure multi-party computation protocols
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Publication:3172965
DOI10.1007/978-3-642-23951-9_5zbMATH Open1401.94169OpenAlexW2072356129MaRDI QIDQ3172965FDOQ3172965
Authors: Emmanuel Prouff, Thomas Roche 
Publication date: 7 October 2011
Published in: Cryptographic hardware and embedded systems -- CHES 2011. 13th international workshop, Nara, Japan, September 28--October 1, 2011. Proceedings (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/978-3-642-23951-9_5
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- Algebraic decomposition for probing security
- Efficient leakage resilient circuit compilers
- Polynomial evaluation and side channel analysis
- Leakage-resilient cryptography over large finite fields: theory and practice
- Threshold Implementation in Software
- How fast can higher-order masking be in software?
- Masking tables -- an underestimated security risk
- ParTI -- towards combined hardware countermeasures against side-channel and fault-injection attacks
- Codes for side-channel attacks and protections
- Higher-order glitch resistant implementation of the PRESENT S-box
- Secure Multiparty AES
- Masking and leakage-resilient primitives: one, the other(s) or both?
- AES side-channel countermeasure using random tower field constructions
- Complementing Feistel ciphers
- Secure hardware implementation of nonlinear functions in the presence of glitches
- Unifying leakage models: from probing attacks to noisy leakage
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