Parallel Binary Adders with a Minimum Number of Connections

DOI10.1109/TC.1983.1676144zbMATH Open0534.94012OpenAlexW1828395844MaRDI QIDQ3318686FDOQ3318686

Authors: Akito Sakurai, Saburo Muroga 

Publication date: 1983

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.1983.1676144

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zbMATH Keywords

logic designminimal addern-bit parallel binary adderNOR gatesripple addersingle-rail input logic

Mathematics Subject Classification ID

Cited In (6)

• Minimal digit sets for parallel addition in non-standard numeration systems
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• Logic Networks with a Minimum Number of NOR(NAND) Gates for Parity Functions of n Variables
• Two operand binary adders with threshold logic

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