Logic Networks with a Minimum Number of NOR(NAND) Gates for Parity Functions of n Variables

DOI10.1109/TC.1987.1676878MaRDI QIDQ3745772zbMATH OpenFDO

Authors Hung Lai Chi, Saburo Muroga

Publication date 1987

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TC.1987.1676878

zbMATH Keywords

integer programming logic designminimum networksNAND gatesNOR gatesparity functionssingle-rail input logic

Mathematics Subject Classification ID

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