Numerical analysis on thermal characteristics for chip scale package by integrating 2D/3D models

DOI10.1002/JNM.694MaRDI QIDQ3605175zbMATH OpenOpenAlexFDO

Authors

Publication date 20 February 2009

Published in International Journal of Numerical Modelling: Electronic Networks, Devices and Fields (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1002/jnm.694

zbMATH Keywords

numerical simulationfinite elementthermal stressthermal strainchip scale packagetemperature cycling

Mathematics Subject Classification ID

Thermal effects in solid mechanics (74F05) Finite element methods applied to problems in solid mechanics (74S05)

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Cited in

(4)

• Failure analysis of a semiconductor packaging leadframe using the signal processing approach
• Thermal performance of a forced convection air cooled PBGA package in a compact thin casing
• Thermal analysis of multi-finger GaInP collector-up heterojunction bipolar transistors with miniature heat-dissipation packaging structures
• 3-D finite element simulation of wafer thermal distortion and stress fields in exposure process

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