Numerical analysis on thermal characteristics for chip scale package by integrating 2D/3D models
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Publication:3605175
DOI10.1002/JNM.694zbMATH Open1419.74105OpenAlexW4256202932MaRDI QIDQ3605175FDOQ3605175
Authors:
Publication date: 20 February 2009
Published in: International Journal of Numerical Modelling: Electronic Networks, Devices and Fields (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1002/jnm.694
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Cited In (4)
- Failure analysis of a semiconductor packaging leadframe using the signal processing approach
- Thermal performance of a forced convection air cooled PBGA package in a compact thin casing
- Thermal analysis of multi-finger GaInP collector-up heterojunction bipolar transistors with miniature heat-dissipation packaging structures
- 3-D finite element simulation of wafer thermal distortion and stress fields in exposure process
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