scientific article; zbMATH DE number 1310108

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Publication:4254237





This book is an in-depth critical review, somewhere philosophical, on computer hardware description languages. The author tries to go to the very heart of the concepts and principles behind HDL's. Special attention is paid to requirements imposed on HDL's during evolution of HDL's. In the comprehensive presentation of historical landscape (which includes an insightful overview of the foremost HDLs of the past three decades) it is shown how these requirements influenced the evolution of HDL principles. Much of the author's effort is devoted to the comparison of two most popular HDL's in practical usage -- VHDL and VERILOG. Two sections are devoted to hot topics in present applications, namely parallel processing and modeling of transport delay needed in design of high-speed computer buses. Moreover, further key issue are the differences between HDLs and programming languages. Chapter 1 introduces HDLs, traces the origins of the early HDLs, and attempts to explain what is the fundamental definition of an HDL. Chapter 2 follows the evolutionary development of the early HDLs (from gate-level simulators such as LAMP, SALOGS, TEGAS to register-transfer languages CDL, AHPL, ISP) and analyzes the fundamental differences between HDLs and programming languages. Chapter 3 presents the fundamental characteristics of hardware, which constitute the basis for requirements put on behavior level HDL's. The following concepts constitute the basis for hardware characteristics: entity, connectivity, concurrency, timing (very emphasized) and hierarchy. It is argued that the language should be consistent with these characteristics, and the language constructs of a behavior-level HDL must be natural. It is the author's wish that the reader will acquire a vision that will allow him or her to comprehend the past 30 years of HDL effort in a nutshell. Chapter 4 examines the ADLIBSABLE, predecessor of matured behavior-level languages very carefully and critically. Chapter 5 analyses the Verilog language. Chapter 6 presents an exercise towards a simple and effective HDL design. Chapter 7 analyses the massive VHDL effort. It analyzes both its achievements and weaknesses, reasons the causes for the limitations, and presents mechanisms to address the limitations. Chapter 8 illustrates the development of hardware descriptions from the first principles through a series of case studies -- three real world complex digital systems. Chapter 9 presents the principles underlying the concurrent simulation of the HDLs in general and VHDL in particular. The ideas of P2EDAS approach, that is capable of asynchronous and concurrent simulation of VHDL models on parallel processors including the detection and preemption of inconsistent events are presented. Chapter 10 addresses the issue of transport delay that is gaining increasing importance especially in newer computer bus design techniques. This chapter shows how two apparently diverse branches of knowledge -- languages and grammars from computer science and the classical transmission line theory in electrical engineering -- must come together to solve a problem. Finally, Chapter 11 summarizes the book and presents some thoughts on where HDLs are headed in the future. This very interesting book is written for practicing electronic CAD engineers, researchers in simulation and verification of electronic CAD, as well as for students in computer and electronic hardware design.











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