Comparison and evaluation of lot-to-order matching policies for a semiconductor assembly and test facility
From MaRDI portal
Publication:4497252
DOI10.1080/002075400188627zbMath0944.90554MaRDI QIDQ4497252
W. Matthew Carlyle, John W. Fowler, Kraig R. Knutson
Publication date: 22 August 2000
Published in: International Journal of Production Research (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1080/002075400188627
90B30: Production models
Related Items
Forming and scheduling jobs with capacitated containers in semiconductor manufacturing: Single machine problem, Semiconductor lot allocation using robust optimization, Lot-order assignment applying priority rules for the single-machine total tardiness scheduling with nonnegative time-dependent processing times, Evaluation of heuristics for a class-constrained lot-to-order matching problem in semiconductor manufacturing