A novel decimal logarithmic converter based on first-order polynomial approximation

DOI10.1007/S00034-011-9365-YMaRDI QIDQ453697zbMATHOpenAlexFDO

Authors Dongdong Chen, Seok-Bum Ko

Publication date 27 September 2012

Published in Circuits, Systems, and Signal Processing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s00034-011-9365-y

zbMATH Keywords

FPGAdecimal computer arithmeticdecimal logarithmic converterfirst-order polynomial approximation

Mathematics Subject Classification ID

Randomized algorithms (68W20) Mathematical problems of computer architecture (68M07)

Recommendations

• Error-free algorithm and architecture of radix-10 logarithmic converter
• Method of binary log-antilog evaluation in hardware for fast arithmetic- logical units. I
• On the fast generation of base-k logarithm
• An improved residue-to-binary converter
• An iterative method for improving decimal calculations on computers

Cites work

• scientific article; zbMATH DE number 3190685 (Why is no real title available?)
• Generation of Products and Quotients Using Approximate Binary Logarithms for Digital Filtering Applications

Cited in

(6)

• Method of binary log-antilog evaluation in hardware for fast arithmetic- logical units. I
• Error-free algorithm and architecture of radix-10 logarithmic converter
• A study of decimal left shifters for binary numbers
• Complete factorization of the \(2m\)-band paraunitary polyphase matrix with multiple centers of symmetry
• Optimal nonlinear signal approximations based on piecewise constant functions
• Signal approximations based on nonlinear and optimal piecewise affine functions

Describes a project that uses

Uses Software

• SLEEF
• Xilinx

This page was built for publication: A novel decimal logarithmic converter based on first-order polynomial approximation

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q453697)