Computer Aided Verification

DOI10.1007/B98490zbMATH Open1103.68075OpenAlexW4298302743MaRDI QIDQ5312943FDOQ5312943

Authors: Kedar S. Namjoshi 

Publication date: 25 August 2005

Published in: Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/b98490

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Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60)

Cited In (12)

• Extracting unsatisfiable cores for LTL via temporal resolution
• Towards a notion of unsatisfiable and unrealizable cores for LTL
• Inherent vacuity in lattice automata
• Title not available (Why is that?)
• Vacuity in practice: temporal antecedent failure
• Timed vacuity
• Before and after vacuity
• On the Notion of Vacuous Truth
• Linear temporal logic symbolic model checking
• Synthesizing non-vacuous systems
• Vacuity in synthesis
• Beyond vacuity: towards the strongest passing formula

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