A VLSI design for computing exponentiations in GF(2/sup m/) and its application to generate pseudorandom number sequences

DOI10.1109/12.45211zbMATH Open1395.11141OpenAlexW2027457414MaRDI QIDQ5375439FDOQ5375439

Authors: Charles C. Wang, Dingyi Pei 

Publication date: 14 September 2018

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/12.45211

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Mathematics Subject Classification ID

Communication theory (94A05) Cryptography (94A60) Algebraic coding theory; cryptography (number-theoretic aspects) (11T71) Number-theoretic algorithms; complexity (11Y16) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cited In (1)

• VLSI algorithms, architectures, and implementation of a versatile GF(2/sup m/) processor

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