Analog property checkers: a DDR2 case study
From MaRDI portal
Publication:5962118
DOI10.1007/s10703-009-0085-xzbMath1207.68208MaRDI QIDQ5962118
Kevin D. Jones, Dejan Ničković, Victor Konrad
Publication date: 16 September 2010
Published in: Formal Methods in System Design (Search for Journal in Brave)
Full work available at URL: https://openaccess.city.ac.uk/id/eprint/1066/1/ddr2-journal.pdf
68Q60: Specification and verification (program logics, model checking, etc.)
Related Items
Parameter Synthesis Through Temporal Logic Specifications, Parameter synthesis of polynomial dynamical systems, System design of stochastic models using robustness of temporal properties
Uses Software
Cites Work
- Temporal Logic Verification Using Simulation
- The benefits of relaxing punctuality
- Automated Technology for Verification and Analysis
- Test Coverage for Continuous and Hybrid Systems
- Checking Temporal Properties of Discrete, Timed and Continuous Behaviors
- Formal Techniques, Modelling and Analysis of Timed and Fault-Tolerant Systems
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