A fault-tolerant and scalable column-wise reversible quantum multiplier with a reduced size
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Publication:6043556
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Cites work
- Controlled gates for multi-level quantum computation
- Cost-efficient design of a quantum multiplier-accumulator unit
- Decompositions of \(n\)-qubit Toffoli gates with linear circuit complexity
- Effective designs of reversible Vedic multiplier
- Heuristic methods to use don't cares in automated design of reversible and quantum logic circuits
- Improving the quantum cost of reversible Boolean functions using reorder algorithm
- Mapping NCV Circuits to Optimized Clifford+T Circuits
- On figures of merit in reversible and quantum logic designs
- Optimization approaches for designing quantum reversible arithmetic logic unit
- Optimized 4-bit quantum reversible arithmetic logic unit
- Quantum Computing for Computer Scientists
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