Lightweight transactional memory systems for NoCs based architectures: design, implementation and comparison of two policies

DOI10.1016/J.JPDC.2010.02.007zbMATH Open1233.68167OpenAlexW2038910711MaRDI QIDQ666232FDOQ666232

Authors Quentin L. Meunier, Frédéric Pétrot

Publication date 7 March 2012

Published in Journal of Parallel and Distributed Computing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/j.jpdc.2010.02.007

zbMATH Keywords

performancehardwarenetwork-on-chiptransactional memorycoherence protocolcycle-accurate simulationwrite-through vs. write-back

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)

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Cites work

• Software transactional memory

Cited in

(1)

• Embedded-TM: energy and complexity-effective hardware transactional memory for embedded multicore systems

Describes a project that uses

Uses Software

• SPLASH-2
• SoCLib

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