Faster optimal parallel prefix circuits: new algorithmic construction

DOI10.1016/J.JPDC.2005.05.017zbMATH Open1103.68976OpenAlexW2118884301MaRDI QIDQ852883FDOQ852883

Authors: Yen-Chun Lin, Chin-Yu Su 

Publication date: 15 November 2006

Published in: Journal of Parallel and Distributed Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.jpdc.2005.05.017

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zbMATH Keywords

depthparallel algorithmsprefix computationcombinational circuitsdepth-size optimalfan-outsize optimal

Mathematics Subject Classification ID

Parallel algorithms in computer science (68W10) Analytic circuit theory (94C05)

Cited In (10)

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• Constructing \(H\)4, a fast depth-size optimal parallel prefix circuit
• A new approach to constructing optimal parallel prefix circuits with small depth
• A new class of depth-size optimal parallel prefix circuits
• On the complexity of parallelizing sequential circuits using the parallel-prefix method
• Fast and Efficient Circuit Topologies forFinding the Maximum of n k-Bit Numbers
• A class of almost-optimal size-independent parallel prefix circuits
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• Functional and dynamic programming in the design of parallel prefix networks

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