Resynchronization for multiprocessor DSP systems

DOI10.1109/81.895327MaRDI QIDQ2724315zbMATH OpenOpenAlexFDO

Authors Shuvra S. Bhattacharyya, Sundararajan Sriram, Edward A. Lee

Publication date 25 March 2002

Published in IEEE Transactions on Circuits and Systems. I: Fundamental Theory and Applications (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/81.895327

zbMATH Keywords

digital signal processingembedded multiprocessorsiterative dataflow graphsmultiprocessor schedulingpipeliningreal-time signal processingresynchronizatonself-timed systemsset coveringshared memoryVLSI signal processing

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Signal theory (characterization, reconstruction, filtering, etc.) (94A12)

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(5)

• The relationship between attribute reducts in rough sets and minimal vertex covers of graphs
• Intermediate representations for design automation of multiprocessor DSP systems
• Experimental analysis of approximation algorithms for the vertex cover and set covering problems
• Synthesis of resources sharing
• Exploiting the expressiveness of cyclo-static dataflow to model multimedia implementations

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