Simulation of faults in logical networks with races

MaRDI QIDQ1072997zbMATH OpenFDO

Authors V. A. Ermilov

Publication date 1985

Published in Automation and Remote Control (Search for Journal in Brave)

zbMATH Keywords

input sequenceoutput sequence

Mathematics Subject Classification ID

Review text

Given the input sequence of a logical network with faults from a specified set, we construct the output sequence for the case when both the normally functioning circuit and the faulty network may contain races.

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Cited in

(1)

• Termination conditions in the simulation of logical networks with faults

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