The following pages link to Yici Cai (Q848300):
Displayed 10 items.
- A single layer zero skew clock routing in X architecture (Q848302) (← links)
- Corner block list representation and its application with boundary constraints (Q866048) (← links)
- Reliable buffered clock tree routing algorithm with process variation tolerance (Q866187) (← links)
- Item:Q848300 (redirect page) (← links)
- FaSa: A fast and stable quadratic placement algorithm (Q1415932) (← links)
- An optimum placement search algorithm based on extended corner block list. (Q1433950) (← links)
- Legitimate skew clock routing with buffer insertion (Q2432131) (← links)
- Application of optical proximity correction technology (Q2481784) (← links)
- Floorplanning with abutment constraints based on corner block list (Q4539953) (← links)
- Hierarchical 3-D Floorplanning Algorithm for Wirelength Optimization (Q4590521) (← links)