Using PARBIT to implement partial run-time reconfigurable systems

DOI10.1007/3-540-46117-5_20MaRDI QIDQ4407318zbMATH OpenFDO

Authors Edson L. Horta, John W. Lockwood, Sergio T. Kofuji

Publication date 29 June 2003

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL http://link.springer.de/link/service/series/0558/bibs/2438/24380182.htm

Mathematics Subject Classification ID

Computing methodologies and applications (68U99)

Recommendations

• Development of a run-time reconfiguration system with low reconfiguration overhead
• Designing run-time reconfigurable systems with JHDL
• Introduction to reconfigurable computing. Architectures, algorithms and applications. Foreword by Reiner Hartenstein.
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Cited in

(7)

• Run-time reconfiguration to check temperature in custom computers: An application of JBits technology
• Partially reconfigurable cores for Xilinx Virtex
• Handling FPGA faults and configuration sequencing using a hardware extension
• Rapid construction of partial configuration datastreams for high-level constructs using JBits
• Prototyping of concurrent control systems implemented in FPGA devices
• Designing run-time reconfigurable systems with JHDL
• Development of a run-time reconfiguration system with low reconfiguration overhead

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