The delay of circuits whose inputs have specified arrival times
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Publication:2370422
DOI10.1016/j.dam.2006.10.013zbMath1120.68012MaRDI QIDQ2370422
Christian Szegedy, Dieter Rautenbach, Jürgen Werber
Publication date: 26 June 2007
Published in: Discrete Applied Mathematics (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/j.dam.2006.10.013
VLSI design; size; depth; circuit; static timing analysis; computer arithmetic; straight-line program; prefix problem
68W35: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.)
68M07: Mathematical problems of computer architecture
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Fast prefix adders for non-uniform input arrival times, Delay optimization of linear depth Boolean circuits with prescribed input arrival times, Constructing depth-optimum circuits for adders and \textsc{And}-\textsc{Or} paths, On the cost of optimal alphabetic code trees with unequal letter costs
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