A Characterization of Ternary Simulation of Gate Networks

DOI10.1109/TC.1987.5009471MaRDI QIDQ3783220zbMATH OpenOpenAlexFDO

Authors Carl-Johan H. Seger, Janusz Brzozowski

Publication date 1987

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.1987.5009471

zbMATH Keywords

asynchronous behaviorbehavior of VLSI circuitsBrzozowski-Yoeli conjecturegate networkrace detectionsequential networksternary simulation

Mathematics Subject Classification ID

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