Array resolutions of linear maps

DOI10.1007/BF01598955MaRDI QIDQ1108007zbMATH OpenOpenAlexFDO

Authors William A. Porter, Jorge L. Aravena

Publication date 1987

Published in Circuits, Systems, and Signal Processing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/bf01598955

zbMATH Keywords

array processingconcurrencyVLSI

Mathematics Subject Classification ID

Cellular automata (computational aspects) (68Q80)

Review text

The identification of concurrency is a critical factor in the high-speed calculation of algorithms. This study considers maps on X, a discrete resolution space. We establish a resolution on the space of linear maps on X which exhibit compatibility with array processing. Our results are extended to the partially ordered resolution space setting. While on-line array processing motivates our study, the results also suggest efficient processing procedures for off-line applications.

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Cites work

• A pipelined tree machine architecture for computing a multidimensional convolution
• Operator factorization on partially ordered Hilbert resolution spaces
• Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations
• Resolution space, operators and systems
• The Design of Optimal Systolic Arrays

Cited in

(2)

• On the number of signals resolvable by a uniform linear array
• Nonplanar switchable arrays

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