Nonplanar switchable arrays
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Publication:921927
DOI10.1007/BF01602098zbMath0709.68521OpenAlexW1963853729MaRDI QIDQ921927
William A. Porter, Jorge L. Aravena
Publication date: 1988
Published in: Circuits, Systems, and Signal Processing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/bf01602098
Cites Work
- Array resolutions of linear maps
- A systolic architecture for optimal filter design support
- Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations
- Dynamically Restructurable Fault-Tolerant Processor Network Architectures
- The Design of Optimal Systolic Arrays
- A pipelined tree machine architecture for computing a multidimensional convolution
- A Practical Algorithm for the Solution of Triangular Systems on a Parallel Processing System
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